-- ***********************************************************************
--
-- DESCRIPTION
--
--   Product Register component.
-- 
-- REQUIRED COMPONENTS
--
--   None.
--
-- PORTS
--
--   (I)  Product_In:  Data-In (9 bits)
--   (I)  Clk:         Clock (1 bit)
--   (I)  Reset:       Reset (1 bit)
--   (I)  Load:        Load (1 bit)
--   (I)  Shift_Right: Shift-Right (1 bit)
--   (O)  Product_Out: Data-Out (16 bits)
--
-- AUTHORS
--
--   14.12.2001 - Xavier Perseguers & Tadeusz Senn
--
-- ***********************************************************************

-- Declarations ----------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;

-- Entity ----------------------------------------------------------------

entity Product_Register is
	port (Product_In : in std_logic_vector(8 downto 0);
		  Clk, Reset, Load, Shift_Right : in std_logic;
		  Product_Out : out std_logic_vector(16 downto 0));
end Product_Register;

-- Architecture ----------------------------------------------------------

architecture comportemental of Product_Register is
	signal sData : std_logic_vector (16 downto 0);
begin
	process (Clk, Reset, Product_In, sData)
	begin
		Product_Out <= sData;
	
		if (Reset = '1') then
			sData <= (others => '0');
		elsif (Clk'event and Clk = '1') then
			if (Load = '1') then
				sData(16 downto 8) <= Product_In; 
			elsif (Shift_Right = '1') then
				sData <= '0' & sData(16 downto 1);
			end if;
		end if;
	end process;
end comportemental;